Grouping Heuristics for Word-Level Decision Diagrams
نویسندگان
چکیده
Word-Level Decision Diagrams (WLDDs), like EVBDDs, *BMDs, HDDs, K*BMDs, are powerful tools in circuit veriication. Especially for some arithmetic circuits, like multipliers, for the rst time formal veriication was possible using WLDDs. Beside a good variable ordering and the decomposition types the size of a WLDD essentially depends on the grouping of the outputs. In this paper we study output grouping in more detail. We give examples showing that an exponential reduction or an exponential blow-up can be obtained dependent on grouping. We describe eecient heuristics for output grouping given a circuit description in the form of a netlist. Experimental results are given to demonstrate the eeciency of our approach.
منابع مشابه
Word - Level Decision Diagrams , WLCDs
Several types of Decision Diagrams (DDs) have been proposed for the veriication of Integrated Circuits. Recently, word-level DDs like bmds, *bmds, hdds, k*bmds and *phdds have been attracting more and more interest, e.g., by using *bmds and *phdds it was for the rst time possible to formally verify integer multipliers and oating point multipliers of \signiicant" bitlengths, respectively. On the...
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